Coach teams on reliability failure investigations, ensuring a deep understanding of failure mechanisms and stress test behaviors in accordance with JEDEC and AEC-Q standards.
Facilitate and lead structured problem-solving activities using methodologies such as Six Sigma, 8D, and 5 Why Analysis to identify root causes and implement effective corrective and preventive actions.
Drive hands-on design evaluation, hardware validation, first article assessment, debug, documentation, and release-to-production activities for wafer test hardware
Working closely with cross-functional teams including Design Engineering, PTE-Lab Engineers, Logistics, and Manufacturing to ensure that products are fully tested.
Supports QM Manager in overseeing the internal Corrective and Preventive Action (CAPA) process for both factory and office functions, ensuring timely investigation, implementation, and closure of corrective actions. Performs data trending monthly for reporting at CRB meeting and inputs to Management Review.