Design, implement, and maintain synthesis, DFT, and STA scripts using industry best practices to improve automation, flow robustness, and design quality.
Design, implement, and maintain synthesis, DFT, and STAscripts using industry best practices to improve automation, flow robustness,and design quality.
Work closely with the SPEED architect, quantitative researchers, and the business to provide high ROI solutions that are aligned with both the business and the platform strategy.
Expected to be able to work with limited direction, have keen attention to detail, and be able to provide crisp status of progress, issues, and risks on the program to the management team.
Implement high-precision timing control logic to accurately generate the internal timing signals required for various operations (such as tR, tPROG, tBERS, etc.);
Develop testbenches, assertions, checkers, and block or subsystem-level verification environments to validate controller behavior, detection logic, configuration programming, fault response, and status reporting.
Work directly with business stakeholders to understand requirements, assess reported issues and translate operational needs into technical improvements.