Coach teams on reliability failure investigations, ensuring a deep understanding of failure mechanisms and stress test behaviors in accordance with JEDEC and AEC-Q standards.
Facilitate and lead structured problem-solving activities using methodologies such as Six Sigma, 8D, and 5 Why Analysis to identify root causes and implement effective corrective and preventive actions.
Drive hands-on design evaluation, hardware validation, first article assessment, debug, documentation, and release-to-production activities for wafer test hardware
Design and execute persona/role-playing evaluation frameworks, covering metrics such as identity recognition, role compatibility, multi-turn stability, and style consistency.
Design and execute persona/role-playing evaluation frameworks, covering metrics such as identity recognition, role compatibility, multi-turn stability, and style consistency.
Familiar with data centre construction quality requirements, testing and commissioning procedures, and relevant standards including ISO 9001, ANSI/TIA-942, ASHRAE thermal guidelines, Uptime Institute Tier principles, ASTM, ANSI, ACI, Singapore Standards and applicable Codes of Practice will be advantageous.