Ensuring ongoing site supplier evaluation is performed. This would be achieved by using site information collected from Receiving Inspection, MRB, Customer Returns, SCAR database and by liaison efforts with customer work cells. Performance will be reported internally, to the supplier, and to the customer where applicable.
Perform supplier audit interfacing with Corporate SQE if applicable.
To provide documentation to perform Inspection of components per Inspection Plans in SAP.
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Hands-on experience in SoC and/or FPGA RTL design, testbench development, logic verification, timing closure and debugging in accordance with functional safety requirements.
Demonstrate technical ownership of safety related SoC and/or FPGA Soft IP development and verification with proven ability to generate audit ready Functional Safety evidence in compliance with IEC 61508, ISO 26262 or other safety standards.
Working knowledge of any FPGA primitives such as embedded block RAM, DSP blocks, PLL, oscillators, I/O Gearing, configuration/security or power related silicon features is a plus.
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Hands-on experience in FPGA RTL design, testbench development, logic verification, timing closure and debugging.
Expert in one or more FPGA primitives such as embedded block RAM, DSP blocks, PLL, oscillators, I/O Gearing, configuration/security or power related silicon features.
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