- Clementi West Region (Singapore) Singapore
BRIGHTECS INNOVATION PTE. LTD. Hiring! Full Time Senior SRAM Design Engineer in West Region (Singapore), Earn up to SGD 12,500 - Ricebowl
Senior SRAM Design Engineer
BRIGHTECS INNOVATION PTE. LTD.
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Job Description
Responsibilities
Key Responsibilities:
Develop SRAM Compilers and custom Instance circuits to meet specific PPA customization requirements.
Perform transistor-level circuit simulation and verification using EDA tools, and analyze circuit functionality and performance to ensure designs satisfy requirements.
Develop SRAM Compiler Tiling Code.
Responsible for SRAM Compiler characterization analysis and delivering Design Kits.
Design SRAM Verilog functional models and perform verification.
Required Qualifications:
Master's degree or above in Microelectronics, Integrated Circuit Design, Electronic Information, or related fields.
Understanding of semiconductor process and device physics, with mastery of transistor-level circuit design principles.
Familiarity with EDA tools (e.g., HSPICE, Spectre, Virtuoso, WaveView, etc.) is preferred.
Knowledge of the Verilog language.
Proficiency in at least one scripting language (e.g., Perl, Python, TCL, Shell, etc.) is preferred.
We are a Singapore-based integrated circuit (IC) design house specializing in Dynamic Random Access Memory (DRAM) design and development.
Our services include full-custom IC layout design and physical verification, covering floorplan optimization, DRC/LVS/ERC checks, and DFM compliance analysis.
With expertise in advanced process technologies such as FinFET and wafer-on-wafer, we are committed to delivering efficient and reliable chip design solutions.
Driven by innovation, precision, and collaboration, our team is dedicated to advancing memory technology.
Develop SRAM Compilers and custom Instance circuits to meet specific PPA customization requirements.
Perform transistor-level circuit simulation and verification using EDA tools, and analyze circuit functionality and performance to ensure designs satisfy requirements.
Develop SRAM Compiler Tiling Code.
Responsible for SRAM Compiler characterization analysis and delivering Design Kits.
Design SRAM Verilog functional models and perform verification.
Required Qualifications:
Master's degree or above in Microelectronics, Integrated Circuit Design, Electronic Information, or related fields.
Understanding of semiconductor process and device physics, with mastery of transistor-level circuit design principles.
Familiarity with EDA tools (e.g., HSPICE, Spectre, Virtuoso, WaveView, etc.) is preferred.
Knowledge of the Verilog language.
Proficiency in at least one scripting language (e.g., Perl, Python, TCL, Shell, etc.) is preferred.
We are a Singapore-based integrated circuit (IC) design house specializing in Dynamic Random Access Memory (DRAM) design and development.
Our services include full-custom IC layout design and physical verification, covering floorplan optimization, DRC/LVS/ERC checks, and DFM compliance analysis.
With expertise in advanced process technologies such as FinFET and wafer-on-wafer, we are committed to delivering efficient and reliable chip design solutions.
Driven by innovation, precision, and collaboration, our team is dedicated to advancing memory technology.
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