ASEM - Advanced Semiconductor Academy Of Malaysia Hiring! Full Time ASIC Front-end development project manager in Federal Territory - Ricebowl

Organisation: Advanced Semiconductor Academy of Malaysia (ASEM)

Position: Senior IC Design Engineer – Curriculum & R&D

Location: Selangor, Malaysia

Department: Semiconductor Technology & Talent Development

Position Summary

We are seeking an experienced Senior IC Design Engineer (Curriculum & R&D) to lead the development of industry-relevant IC design training programmes, coordinate semiconductor R&D initiatives, and manage technical collaborations with universities, industry partners, EDA vendors, and foundries.

The role requires strong ASIC/SoC design knowledge, particularly in digital IC design, RTL-to-GDSII implementation, IP integration, and semiconductor design methodologies.

The successful candidate will be responsible for curriculum design and review, technical teaching, EDA license management, university R&D coordination, and tape-out project facilitation.

This position combines technical engineering expertise, education development, and R&D project management to strengthen Malaysia’s semiconductor talent and chip design ecosystem.

Key Responsibilities

1. IC Design Curriculum Development & Review

* Design, develop, and continuously improve IC design training curricula aligned with semiconductor industry requirements.

* Develop structured learning pathways covering digital IC design, RTL design, functional verification, synthesis, physical design, and SoC integration.

* Review and enhance technical modules covering:

* Digital IC Design: Verilog/SystemVerilog, RTL, FSM and micro-architecture.

* ASIC Design Flow: RTL-to-GDSII, synthesis, STA, placement, routing, and sign-off.

* SoC Architecture & Integration: IP integration, AXI/AHB/APB, memory interfaces, clock/reset, and power management.

* Design Verification: Testbench development, simulation, debugging, and functional verification.

* Advanced Topics: RISC-V, AI accelerators, low-power design, and semiconductor IP development.

* Develop hands-on lab exercises, technical assessments, and industry-based capstone projects.

* Collaborate with semiconductor companies to incorporate real-world design requirements and industry use cases.

* Evaluate programme effectiveness and update training materials based on employer feedback and emerging technologies.

2. Technical Teaching & Engineering Mentorship

* Deliver technical lectures, practical workshops, and laboratory sessions in ASIC/SoC and IC design.

* Guide students through RTL development, simulation, verification, synthesis, and physical implementation.

* Supervise student projects involving IP design, subsystem integration, and RTL-to-GDSII implementation.

* Review RTL code, design specifications, verification results, and technical project deliverables.

* Mentor junior engineers, students, and trainers on industry-standard design methodologies.

* Support train-the-trainer programmes and technical knowledge transfer initiatives.

3. Semiconductor R&D & University Collaboration

* Coordinate joint semiconductor R&D projects with universities, research institutions, and industry partners.

* Facilitate research activities involving ASIC/SoC design, IP development, RISC-V, AI accelerators, and advanced semiconductor technologies.

* Support technical solution definition, architecture reviews, micro-architecture development, and IP integration activities.

* Coordinate research project milestones, technical deliverables, engineering resources, and documentation.

* Identify opportunities for joint IP development, technology transfer, prototype development, and commercialisation.

* Act as the technical liaison between university researchers, engineering teams, and industry partners.

4. Tape-Out & IC Design Project Coordination

* Coordinate university and industry IC design projects from design planning to tape-out submission.

* Facilitate collaboration with foundries, MPW service providers, EDA vendors, and research institutions.

* Support the coordination of PDK access, IP libraries, design specifications, and foundry requirements.

* Monitor technical milestones including RTL development, verification, synthesis, physical design, DRC/LVS, timing sign-off, and GDSII submission.

* Review design readiness and coordinate technical issue resolution with relevant engineering teams.

* Support post-silicon testing, chip validation, silicon bring-up, and project documentation where applicable.

5. EDA License & Technical Infrastructure Management

* Manage the allocation, utilisation, renewal, and administration of EDA software licenses.

* Coordinate with EDA vendors including Cadence, Synopsys, Siemens EDA, and other technology providers.

* Ensure EDA tools, design environments, computing resources, and technical infrastructure support training and R&D activities.

* Coordinate software installation, license access, technical troubleshooting, and vendor support.

* Monitor license usage, compliance, and cost optimisation.

* Support the establishment and improvement of shared IC design laboratories and technical facilities.

6. Technical Advisory & Industry Coordination

* Serve as a technical representative in discussions with universities, semiconductor companies, EDA vendors, and foundries.

* Evaluate new technologies, technical training solutions, and semiconductor research opportunities.

* Participate in technical reviews, programme planning, and industry advisory discussions.

* Prepare technical reports, curriculum review documents, R&D progress updates, and management presentations.

* Coordinate cross-functional technical issues involving RTL, verification, physical design, IP integration, software, and project teams.

Requirements

Education & Experience

1. Bachelor’s degree or above in Electrical & Electronic Engineering, Microelectronics, Computer Engineering, Semiconductor Engineering, or related fields.

2. Minimum 5 years of relevant experience in ASIC/SoC design, IC design engineering, semiconductor R&D, or related technical fields.

3. Solid understanding of IC design methodologies, including specifications, RTL design, verification, synthesis, physical implementation, and tape-out.

4. Hands-on experience with industry-standard EDA tools such as Cadence, Synopsys, or Siemens EDA.

5. Familiarity with Verilog/SystemVerilog and the ability to understand and review RTL designs.

6. Understanding of SoC architecture, IP integration, AXI/AHB/APB interfaces, clock/reset, timing, and power management.

7. Experience in technical documentation, design reviews, project coordination, or engineering mentorship.

8. Strong written and verbal communication skills in English.

9. Ability to coordinate multiple technical projects and work effectively with universities, vendors, and engineering teams.

Preferred Qualifications

1. Experience in curriculum development, technical training, university teaching, or professional engineering education.

2. Experience as an ASIC/SoC design lead, IP owner, subsystem owner, or technical project lead.

3. Experience in university-industry R&D collaboration, MPW programmes, or semiconductor tape-out projects.

4. Familiarity with RISC-V, AI accelerators, DSP, multimedia SoCs, or other advanced IC design applications.

5. Experience with FPGA prototyping, silicon validation, or chip bring-up.

6. Familiarity with EDA license administration, technical infrastructure, or shared design facilities.

7. Experience coordinating with third-party IP vendors, foundries, or semiconductor technology partners.

8. Exposure to semiconductor research commercialisation, IP development, or technology transfer.

The candidate should be comfortable working across academia and industry, managing multiple technical initiatives, and contributing to Malaysia’s long-term semiconductor capabilities.