Gain expertise into the AMD SoC architecture to characterize next generation Memory Subsystem (Controller, PHY and IO) for various supported protocols such as DDR4, LPDDR4, DDR5, LPDDR5, DDR6 and LPDDR6.
Understand Pattern development nuances and guide the team for bench data collection and debug with lab instruments when necessary.
Work closely with cross functional teams from design and firmware side to identify key new features, firmware stability and ensure proper test coverage for the same.
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Lead characterization strategy and methodology for hardened IP and SoC features across pre- and post-silicon phases; define test plans, acceptance criteria, and quality bars.
Design and develop functional and performance tests to measure timing, frequency, voltage margins, and power/thermal behaviors; own corner/correlation strategy and coverage.
Develop volume system test suites to identify problem areas, coverage gaps, yield limiters, and reliability risks; drive root-cause analysis and corrective actions.
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Own the strategy and methodology for stress test workloads across processor subsystems, coherent interconnects, memory hierarchies, and I/O IP such as PCIe/CXL subsystems in pre- and post-silicon phases.
Build scalable performance tests to measure silicon performance parameters such as timing, frequency and voltage margins.
Develop system-level workloads and test programs that include realistic application stress, volume system test suites to identify problem areas, coverage gaps, yield limiters, and reliability risks; drive root-cause analysis and corrective actions.
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Perform post silicon validation, testing and debug of block functionality on prototype silicon.
Work closely with system architect, project manager, design and verification teams to develop design specifications documents, verification plans, and validation test plans.
Experience in ASIC or digital IC design, with hands‑on involvement in RTL development (Verilog/SystemVerilog) for complex digital blocks or subsystems.
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Perform silicon characterization across process, voltage, and temperature
Conducts engineering evaluation, test program correlation, releases for high volume production and engineering enhancement or improvement projects
Drive Key Performance Indicators such as test time reduction, yield debug, quality improvement across products and drive innovation on test strategy
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Support and influence technical discussions with Design, Test, Quality, and Customer teams that impact final product performance and manufacturability.
Execute product Test, Cost, and Quality gate activities in alignment with development milestones.
Provide timely technical debug and root‑cause analysis for customer‑reported issues; work with quality and customer teams to drive resolution.
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Extensive experience with high speed analog design with blocks like ADC, PLL, clock distribution, receiver front-end, transmitter front-end, serializer, deserializer.
Experience with latest process technologies like 7nm or below FinFET technology.
Bachelors/Masters/PhD Degree in Electronic Engineering
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Extensive experience with high speed analog design with blocks like ADC, PLL, clock distribution, receiver front-end, transmitter front-end, serializer, deserializer.
Experience with latest process technologies like 7nm or below FinFET technology.
Bachelors/Masters/PhD Degree in Electronic Engineering
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