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AllwaysFirst Hiring! Full Time Senior Design Verification Engineer in Pulau Pinang - Ricebowl

Senior Design Verification Engineer

AllwaysFirst

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Working Location

  • Pulau Pinang Malaysia

Job Description

Responsibilities

Location: Penang, Malaysia


About the role

Our client is expanding its semiconductor engineering team and is looking for experienced Design Verification Engineers to support RTL verification and pre-silicon validation of IP designs.


This role will focus on UVM-based verification, SystemVerilog, functional coverage, debugging, assertions, and verification methodology development. The position level will be determined based on the candidate's overall experience and technical expertise.


Key responsibilities:

  • Develop and maintain UVM-based verification environments for IP designs.
  • Create detailed verification test plans based on design specifications, architecture documents, and use cases.
  • Develop constrained-random testbenches, scoreboards, monitors, and other verification components.
  • Perform coverage-driven verification, including functional, code, and assertion coverage.
  • Drive coverage closure by identifying verification gaps and improving test scenarios.
  • Execute gate-level simulations to validate timing, reset sequences, and power-up behavior after synthesis.
  • Apply Formal Property Verification (FPV) to verify critical design properties and identify corner-case issues.
  • Debug simulation failures and work closely with RTL designers to resolve issues.
  • Develop and maintain SystemVerilog Assertions (SVA) where required.
  • Document verification results, coverage metrics, and regression summaries for traceability and quality assurance.
  • Contribute to the development and improvement of verification methodologies.


Requirements

  • Bachelor's or Master's degree in Electrical Engineering or a related field.
  • 5+ years of experience in semiconductor Design Verification.
  • Strong experience in RTL verification and debugging.
  • Solid knowledge of pre-silicon verification methodologies.
  • Hands-on experience with UVM and SystemVerilog.
  • Experience with industry-standard EDA tools.
  • Strong analytical, troubleshooting, and problem-solving skills.
  • Experience in validation and functional verification.
  • Certifications related to validation or verification are a plus.


How to apply?

This opportunity is open to applicants of all nationalities willing to relocate to Penang, Malaysia. If you are interested in this opportunity, please send me your updated resume. Feel free to reply to this post or contact me directly at *************.

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