VySystems Singapore Hiring! Full Time Test Engineer in - Ricebowl

• Test program development for Digital, PMIC, RF & Mixed Signal products on ATE, primarily:
• Advantest 93K – SmarTest 7 / SmarTest 8
• Teradyne UltraFLEX

Work closely with Design Engineers on:

• First silicon debug
• Device characterization
• Test program bring-up
• Production release activities

Debug digital vectors:

• JTAG
• SCAN
• ATPG
• Functional
• MBIST
• Device characterization across PVT (Process, Voltage & Temperature).

Characterization of Mixed Signal IP, including:

• ADC
• DAC
• PLL

Participate in:

• Test program handoff
• Production release
• Yield improvement
• Test time reduction
• Collaborate with Product Engineering, Design Engineering, Quality Engineering, and Foundry Engineering teams.

• Diploma/Degree in Electronics / Electrical Engineering.
• 2–4 years relevant Test Engineering experience preferred.
• Hands-on experience with Teradyne UltraFLEX or Advantest 93K ATE is an advantage.
• Good knowledge of Analog and Digital Electronics.
• Strong analytical and problem-solving skills.
• Comfortable with hands-on laboratory work.