Amlogic Singapore Private Limited Hiring! Full Time Backend Engineer – Synthesis in West Region (Singapore) - Ricebowl

Job Responsibilities

-           Responsible for synthesis from RTL to gate-level netlist

-           Work with RTL design team to create and verify SDC

-           Work with PnR engineers to improve PPA of digital modules

-           Responsible for the DFT (Design for Test) tasks of the entire chip or module, including synthesis, scan insertion, ATPG, MBIST, boundary scan, and functional testing.

-           Collaborate with front-end and back-end teams to perform DFT-related STA, power, and IR drop analysis, ensuring timing closure for DFT designs.

Qualifications

-           Bachelor’s degree or higher in Microelectronics, Electronic Engineering, or a related field.

-           Familiarity with backend design flow and tools; experience with EDA tools such as DC/FC/TetraMax is preferred.

-           Experience in physical implementation and physical verification for large-scale chips at 28nm or below.

-           Proficiency in Verilog, TCL, Perl, and Python is a plus.

-           Strong communication, stress management, and teamwork skills, with the ability to work effectively in a cross-departmental environment.