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Lenovo Hiring! Full Time CPLD Engineer in 台北市, 台灣 - Ricebowl

台北市, 台灣

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Working Location

  • 台北市, 台灣 台灣

Job Description

Responsibilities

General Information

Req #
WD00104566
Career area:
Hardware Engineering
Country/Region:
Taiwan
State:
Taipei City
City:
Taipei
Date:
Wednesday, September 23, 2026
Working time:
Full-time
Additional Locations:
  • Taiwan - Taipei City - Taipei

Why Work at Lenovo

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Lenovo is a US$83 billion revenue global technology powerhouse, ranked #153 in the Fortune Global 500, and serving millions of customers every day in 180 markets. Focused on a bold vision to deliver Smarter Technology for All, Lenovo has built on its success as the world’s largest PC company with a full-stack portfolio of AI-enabled, AI-ready, and AI-optimized devices (PCs, workstations, smartphones, tablets), infrastructure (server, storage, edge, high performance computing and software defined infrastructure), software, solutions, and services. Lenovo’s continued investment in world-changing innovation is building a more equitable, trustworthy, and smarter future for everyone, everywhere. Lenovo is listed on the Hong Kong stock exchange under Lenovo Group Limited (HKSE: 992) (ADR: LNVGY).


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Description and Requirements

Key Responsibilities

  • Design, develop, and implement CPLD functionalities for server motherboards and related add-on/subsystem cards.
  • Develop, code, and validate CPLD solutions, including simulation environment setup, functional verification, simulation testing, and board-level validation.
  • Create and maintain comprehensive design, verification, and test documentation for CPLD development activities.
  • Review and verify CPLD-related schematic designs to ensure functional correctness and compliance with design requirements.
  • Support CPLD debugging, troubleshooting, and issue resolution throughout the entire product development lifecycle, from design to production.
  • Collaborate with cross-functional teams to support new product bring-up, power-on testing, and hardware validation activities, including domestic and international travel when required.

Preferred Qualifications

  • Strong knowledge of FPGA/CPLD architecture, design methodologies, and verification techniques.
  • Experience with HDL languages such as Verilog, VHDL, or SystemVerilog.
  • Familiarity with simulation and debugging tools used in FPGA/CPLD development.
  • Understanding of server hardware architecture, board-level design, and schematic review processes.
  • Strong analytical, problem-solving, and communication skills.
Additional Locations:
  • Taiwan - Taipei City - Taipei
  • Taiwan
  • Taiwan - Taipei City
  • Taiwan - Taipei City - Taipei

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