- Pulau Pinang Malaysia
Working Location
Job Description
Responsibilities
HIRING | Design for Test (DFT) Engineer | Penang, Malaysia
We are looking for an experienced Design for Test (DFT) Engineer to join our semiconductor design team.
Location: Penang, Malaysia
Employment: Permanent | Full-Time
Work Mode: Onsite
Work Authorization: Malaysia Local / PR / RPT ONLY
KEY REQUIREMENTS
4–15 years of hands-on ASIC/SoC DFT experience
Strong experience in Scan & ATPG
Hands-on experience with Scan Insertion, Scan Compression, MBIST & LBIST
Strong knowledge of JTAG (IEEE 1149.1) & IJTAG (IEEE 1687)
Experience with DFT implementation & Test Architecture Development
Experience with one or more DFT tool suites:
• Synopsys – DFTMAX, TetraMAX, Design Compiler, Fusion Compiler
• Siemens/Mentor – Tessent, FastScan, TestKompress
• Cadence – Modus, Genus
Good understanding of Verilog/SystemVerilog
Scripting: Tcl / Python / Perl preferred
ROLE FOCUS
• DFT architecture development for ASIC/SoC designs
• Scan insertion and compression
• ATPG pattern generation & debugging
• RTL and gate-level DFT verification
• Collaboration with Physical Design, RTL, Verification & Product Engineering teams
• Silicon debug, yield analysis & test optimization
• Manufacturing test readiness & silicon bring-up
Education: Bachelor's / Master's in Electrical, Electronics, Computer Engineering or related field.
Interested candidates: Please DM me your updated CV with your total experience, DFT experience, current location, work authorization status, and notice period to *************
Important Information
Never provide your bank or credit card details when applying for jobs. Do not transfer any money or complete unrelated online surveys. If you see something suspicious, Report this Job ad.