- Ang Mo Kio Central Region (Singapore) Singapore
Adecco Personnel Pte Ltd Hiring! Full Time Design Engineer - Digital (Ang Mo Kio - Semicon MNC - URGENT) in Central Region (Singapore), Earn up to SGD 5,000 - Ricebowl
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Working Location
Job Description
Responsibilities
$5000
Monday to Friday, 9am to 6pm
Ang Mo Kio
-
The Opportunity
Our client, Global Semiconductor industry
Seeking for Digital Design Engineer
Monday - Friday, 9:00am to 6:00pm
Working Location: Ang Mo Kio, Singapore
Salary: $4500 - $5000
Nearest MRT: Ang Mo Kio
12 months contract (renewable)
Completion Bonus
The Talent
Diploma or Degree in Engineering, Computer Engineering, Electrical or any related studies
Min 1 to 3 years of relevant experience in semiconductor or high technology R&D environment
Experience in Hardware Design Language (VHDL / Verilog)
Experience in Digital design techniques
RTL coding
Architecture definition
Design and implementation specification
Lint, domain crossing, design for test, design for emulation
Scripting languages (Python, Perls, TCL)
Experience with communication IPS (12C, 13C, SPI, GPIO and UART)
The Job
Manage and handle IP and RTL Design and Verification
Handle IP and System Architecture definition
Design and implementation documentation
Support functional verification and ensuring 100% coverage functionality are full covered
Ad hoc duties will be assigned
Edmond Lee
Direct Line: *************
EA License No: 91C2918
Personnel Registration Number: R23114813
Monday to Friday, 9am to 6pm
Ang Mo Kio
-
The Opportunity
Our client, Global Semiconductor industry
Seeking for Digital Design Engineer
Monday - Friday, 9:00am to 6:00pm
Working Location: Ang Mo Kio, Singapore
Salary: $4500 - $5000
Nearest MRT: Ang Mo Kio
12 months contract (renewable)
Completion Bonus
The Talent
Diploma or Degree in Engineering, Computer Engineering, Electrical or any related studies
Min 1 to 3 years of relevant experience in semiconductor or high technology R&D environment
Experience in Hardware Design Language (VHDL / Verilog)
Experience in Digital design techniques
RTL coding
Architecture definition
Design and implementation specification
Lint, domain crossing, design for test, design for emulation
Scripting languages (Python, Perls, TCL)
Experience with communication IPS (12C, 13C, SPI, GPIO and UART)
The Job
Manage and handle IP and RTL Design and Verification
Handle IP and System Architecture definition
Design and implementation documentation
Support functional verification and ensuring 100% coverage functionality are full covered
Ad hoc duties will be assigned
Edmond Lee
Direct Line: *************
EA License No: 91C2918
Personnel Registration Number: R23114813
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