jobs in Super Micro Computer, Inc.

全职 Sr. Firmware Engineer 工作, 薪水, Super Micro Computer, Inc. 台灣 公司招聘中 - Ricebowl

Sr. Firmware Engineer

Super Micro Computer, Inc.

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Sr. Firmware Engineer


Date: Nov 2, 2026

Location: Chungho, Taiwan, TW

Company: Super Micro Computer

Job Req ID: 30331

About Supermicro:

Supermicro is a Top Tier provider of advanced server, storage, and networking solutions for Data Center, Cloud Computing, Enterprise IT, Hadoop/ Big Data, Hyperscale, HPC and IoT/Embedded customers worldwide. We are the #5 fastest growing company among the Silicon Valley Top 50 technology firms. Our unprecedented global expansion has provided us with the opportunity to offer a large number of new positions to the technology community. We seek talented, passionate, and committed engineers, technologists, and business leaders to join us.

Job Summary:

1. The role responsible for Server System CPLD/FPGA implement and verify.
2. Build up Verilog IP/Module and Test Bench environment speed up project develop.
3. Familiar with Lattice or Intel or Xilinx FPGA design flow to next generation project create.
4. Maintain existing project and new project develop.
5. Develop test and debug environment for speed up project debug and production.

Essential Duties and Responsibilities:

  • Responsible for FPGA/CPLD firmware design.
  • Design, implement, and deliver innovations for AI server products.
  • Instrument code to optimize performance.
  • Design and develop microcontroller and BMC firmware.
  • Experience working closely with the HW team, ODMs, and vendors.
  • Maintain utility to meet internal requirements.

Additional Preferences:

  • Expertise in DMTF Standards (MCTP, SPDM, and PLDM) is a plus.
  • Experience with the Lattice Development Environment is a plus.

Qualifications:

  • Minimum education: Bachelor's degree in computer systems engineering, electrical engineering or equivalent engineering degree.
  • Experience: Minimum 5+ years of related experience and/or training in firmware development.
  • Proficient in C/C++ and Verilog.

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