jobs in AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED

全职 I-O Design Engineer 工作, 薪水 up to SGD 7,000, AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED North Region (Singapore) 公司招聘中 - Ricebowl

I-O Design Engineer

AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED

North Region (Singapore)

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工作地点

  • 1 YISHUN AVENUE 7 North Region (Singapore) Singapore

职位描述

岗位职责

Company Overview

Broadcom Inc. is a global technology leader designing and supplying semiconductor and infrastructure software solutions for data center, networking, software, broadband, wireless, storage, and industrial markets. Visit ************* for more information.

Job Summary

Broadcom’s Central Engineering Group seeks an experienced I/O Design Engineer to design and verify analog and mixed-signal ICs, contributing to advanced AI programs and collaborating within a world-class engineering team.

Responsibilities

  • Design CMOS I/O circuits, high-precision bandgap references, operational amplifiers, comparators, and power-on-reset circuits to meet performance targets
  • Run simulations to validate AC/DC performance, signal integrity, jitter, and power consumption for circuit reliability
  • Perform transistor reliability and electromigration (EMIR) analysis to ensure device robustness
  • Collaborate with layout teams to oversee physical design and verify adherence to specifications
  • Develop Verilog, Synopsys Liberty, and IBIS models to support design integration and verification
  • Create and maintain comprehensive technical documentation including datasheets, application notes, and integration guides for internal and customer use
  • Support chip-level integration and silicon bring-up activities for test chips and customer products to ensure successful deployment

Required competencies and certifications

  • Master’s or PhD degree in Electrical Engineering
  • Minimum 6 years of experience in I/O or analog circuit design
  • Proficient in Cadence Virtuoso schematic capture, layout, and SPICE/Spectre circuit simulation tools
  • Strong understanding of I/O protocols such as GPIO, I2C, I3C, eMMC, RGMII, and SPMI
  • Knowledge of ESD, EMI, and signal integrity principles
  • Experience with advanced CMOS FinFET and GAA process nodes, including technology features, limitations, and power-performance-area tradeoffs

重要安全守则

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