Use AI tools across the digital IC front-end flow; integrate automated agents into verification flows and continuously optimize.
Support microarchitecture reviews, testbench setup, and test case construction for memory subsystems and data movement.
Conduct pre-simulation verification, functional evaluation, performance analysis, and optimization.
Requirements
Master’s or above in Electronics, Computer Science, or related fields.
Basic Verilog/SystemVerilog and UVM verification fundamentals.
No prior experience required; digital IC verification experience is a plus. Learning ability, logical thinking, and technical potential are valued more.
Preferred
Knowledge/experience in memory controllers (DDRC, HBM_Ctrl, 3DDRAM), interconnect (NoC), or AI chips.
Good communication, teamwork, and fluent English.
AI enthusiast who actively uses AI tools for coding and verification; curious and adaptable to new flows, including LPU dataflow chips.
What We Offer
1:1 mentorship from senior experts; unrestricted access to world-leading AI tools; work on world-class AI chips.
Join core projects from day one: full verification flow with AI agents, test point extraction, testbench/case construction, and functional/performance analysis.