全职 FPGA Engineer (Mid to Senior Level) 工作, 薪水, AQSolotl Johor 公司招聘中 - Ricebowl

Location: Johor Bahru, Malaysia (On-site)

Experience: Mid to Senior Level (3+ years of relevant experience)

Salary: Based on experience and qualifications

Email: *************

About AQSolotl

AQSolotl is a quantum technology company committed to accelerating practical quantum computing. We develop and deliver advanced hardware controllers that bridge classical computing with quantum processors, enabling scalable, economical and high-performance qubit control. Our mission is to empower industry innovators to integrate quantum capabilities into real-world applications.

About the Role

We are building a quantum computing solution with a hardware-accelerated pipeline (multi-FPGA). We are extending our FPGA architecture team for this purpose. We are looking for an experienced FPGA Design Engineer who will participate in both the design and verification of new features. The ideal candidate should be comfortable working on high-speed designs with tight timing and utilization constraints.

As part of the team, you will translate quantum computing algorithms into Register Transfer Level (RTL) logic solutions capable of handling high-performance requirements. Your work will be mapped to a variety of FPGA devices.

Responsibilities

• Design and verify RTL for Field-Programmable Gate Arrays (FPGAs) responsible for real-time control of quantum applications.
• Develop self-checking testbenches at both module and integration levels.
• Develop maintainable and extendable solutions, with a focus on automation and reusability.
• Understand requirements and participate in the architecture definition for new features
• Document and review technical designs and processes clearly for both internal and external stakeholders
• Participate in the integration and testing of implemented features

Job Requirements

• Bachelor's or Master's degree in Electronic Engineering, Computer Engineering, or related field
• At least 3 years of experience in FPGA design (Xilinx, Altera, etc.), ideally in high-speed and memory-intensive applications.
• Experience in RTL design using SystemVerilog (preferred) or VHDL.
• Experience in RTL verification using cocotb, VUnit, or UVM (including pyuvm).
• Proficiency in scripting using Python and Bash/Tcl.
• Strong written and verbal communication skills in English.

Preferred Qualifications

• Hands-on experience with MPSoC, Versal, or RFSoC devices.
• Experience with low-latency communication interfaces (e.g., JESD204C, Ethernet).
• Familiarity with hardware/software co-design in embedded Linux environments and cross-team collaboration.

Skills you'll gain from the position

• Design and implement complex digital design systems
• Troubleshoot and debug hardware issues and provide consistent solutions
• Work collaboratively with other hardware and software engineers to meet performance, reliability, and customer requirements

Be part of AQSolotl’s journey in advancing quantum technology.