Layout design of analog mixed signal circuit in accordance with project requirements and specifications.
Block level physical implementation which includes floor-planning, power distribution network, clock and signal routing, analog and mixed signal transistor level layout.
Participate in post-layout circuit performance analysis.
Potential participation in block/IP/chip level integration activities.
Clear understanding of participation in defining layout methodology and flow.
Able to ramp-up quickly on the tools, flows and methodologies.
Requirements:
Bachelor's degree in electrical engineering, Computer Engineering, or a related field.
Minimum 3+ years of experience in custom layout design including mixed-signal design.
Experience with Cadence Virtuoso Layout Suite or similar EDA tools is a must.
Proven expertise in physical verification using LVS (Layout Versus Schematic) and DRC (Design Rule Check) tools.
In-depth knowledge of CMOS (Complementary Metal-Oxide-Semiconductor) process technologies.
Good understanding of analog and mixed signal layout fundamentals, IR, EM, self and coupling capacitances, RC delay and self-heating.
Excellent problem-solving and analytical skills.
Meticulous attention to detail and a commitment to quality.