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全职 Engineer, R-D Process Development (Underfill) 工作, 薪水 up to SGD 4,000, UTAC HEADQUARTERS PTE. LTD. Central Region (Singapore) 公司招聘中 - Ricebowl

Engineer, R-D Process Development (Underfill)

UTAC HEADQUARTERS PTE. LTD.

Central Region (Singapore)

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工作地点

  • 22 ANG MO KIO INDUSTRIAL PARK 2 Central Region (Singapore) Singapore

职位描述

岗位职责

The Underfill Process Development Engineer is responsible for developing, optimizing, qualifying, and sustaining underfill processes for advanced semiconductor packaging technologies. This role focuses on process characterization, material evaluation, reliability improvement, yield enhancement, and equipment optimization for flip chip, SiP  and advanced package assemblies.

The engineer will work closely with customers, material suppliers, equipment vendors, manufacturing teams, and reliability engineers to develop robust and cost-effective underfill solutions that meet quality, reliability, and productivity requirements.

Key Responsibilities

  • Develop and optimize capillary underfill and advanced dispensing  processes for semiconductor packages.
  • Establish process windows for underfill dispense, flow, cure, and post-cure operations.
  • Evaluate new underfill materials and dispensing technologies.
  • Define and execute Design of Experiments (DOE) to improve process capability and performance.
  • Develop processes for advanced packaging applications including Flip Chip, 2.5D, and SiP technologies.

Requirements

  • Bachelor's Degree in Chemical Engineering, Materials Science, Mechanical Engineering, Electronics Engineering, Semiconductor Engineering or related Engineering discipline.
  • At least 3 years of semiconductor packaging process development experience.
  • Experience in underfill process development preferred.
  • Experience in advanced packaging technologies is highly desirable.

Technical Skills Requirements

  • Hands-on experience with underfill dispensing and curing processes. Familiarity with Asymtek, NSW and leading dispensers or equivalent equipment will be an advantage.
  • DOE and statistical analysis
  • Process characterization and optimization
  • Root cause analysis methodologies
  • Yield improvement techniques
  • Semiconductor packaging fundamentals
  • SPC, FMEA, Control Plans
  • Failure analysis methodologies

重要安全守则

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