- Clementi West Region (Singapore) Singapore
全职 SoC Design Engineer 工作, 薪水 up to SGD 15,000, RICORE TECHNOLOGY PTE. LTD. West Region (Singapore) 公司招聘中 - Ricebowl
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Job Responsibilities
Participate in architecture design. Collaborate with cross‑functional teams to analyse and define high‑performance architecture specifications aligned with project requirements.
Take part in chip front‑end design, including module RTL design, clock & reset design, low‑power design, NoC bus development, SoC integration and synthesis implementation.
Conduct PPA (Performance, Power, Area) evaluation and optimisation for modules and subsystems.
Support the DV (Design Verification) team on module‑level and system‑level SoC verification activities.
Engage in chip back‑end iterations, including performance analysis and power analysis.
Participate in chip verification, post‑layout simulation, low‑level software co‑development & debugging, silicon bring‑up and production ramp‑up activities.
Job Requirements
Bachelor’s degree or above in Computer Architecture, Microelectronics, Electronics, Telecommunications or other related electronic‑engineering disciplines, with minimum 3 years of hands‑on SoC chip design experience.
Proven end‑to‑end SoC design experience with tape‑out track‑record. Prior production experience of high‑performance, high‑bandwidth chips on advanced process nodes is highly preferred.
Proficient in bus protocols including CHI, AXI3/4/5, AHB, APB and ACE.
Solid practical experience in PPA design and optimisation. Hands‑on experience in high‑performance SoC design & verification based on RISC‑V or ARM architectures.
Hands‑on experience with flows and tools for Lint, CDC (Clock‑Domain Crossing), and Synthesis.
Prior integration‑design experience with DDR / PCIe / USB / Ethernet / UFS / SDIO protocols is a strong plus.
Prior experience in integration and design of IPs such as AI, NoC, ARM, GPU, DPU, ISP, DSP, Computer Vision and Multimedia is preferred.
Job Responsibilities
Participate in architecture design. Collaborate with cross‑functional teams to analyse and define high‑performance architecture specifications aligned with project requirements.
Take part in chip front‑end design, including module RTL design, clock & reset design, low‑power design, NoC bus development, SoC integration and synthesis implementation.
Conduct PPA (Performance, Power, Area) evaluation and optimisation for modules and subsystems.
Support the DV (Design Verification) team on module‑level and system‑level SoC verification activities.
Engage in chip back‑end iterations, including performance analysis and power analysis.
Participate in chip verification, post‑layout simulation, low‑level software co‑development & debugging, silicon bring‑up and production ramp‑up activities.
Job Requirements
Bachelor’s degree or above in Computer Architecture, Microelectronics, Electronics, Telecommunications or other related electronic‑engineering disciplines, with minimum 3 years of hands‑on SoC chip design experience.
Proven end‑to‑end SoC design experience with tape‑out track‑record. Prior production experience of high‑performance, high‑bandwidth chips on advanced process nodes is highly preferred.
Proficient in bus protocols including CHI, AXI3/4/5, AHB, APB and ACE.
Solid practical experience in PPA design and optimisation. Hands‑on experience in high‑performance SoC design & verification based on RISC‑V or ARM architectures.
Hands‑on experience with flows and tools for Lint, CDC (Clock‑Domain Crossing), and Synthesis.
Prior integration‑design experience with DDR / PCIe / USB / Ethernet / UFS / SDIO protocols is a strong plus.
Prior experience in integration and design of IPs such as AI, NoC, ARM, GPU, DPU, ISP, DSP, Computer Vision and Multimedia is preferred.
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