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全职 [2027] Streamlit QA Platform Engineering Intern (Python, DRC, Dashboards) 工作, 薪水, MediaTek 公司招聘中 - Ricebowl

[2027] Streamlit QA Platform Engineering Intern (Python, DRC, Dashboards)

MediaTek

Singapore

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工作地点

  • Singapore

职位描述

岗位职责

Job Description

About the role: We’re seeking computer science interns to build a production-style QA platform delivered as a Streamlit app. The app will trigger and monitor DRC runs, track cycle time (days to completion), iteration history, and rule stability, and provide a simple in-app chatbot for common engineer FAQs. What you will do: - Build a multipage Streamlit app (navigation, session state, role-based views). - Pages for creating/launching QA runs, monitoring progress, and reviewing results. - KPI dashboards for cycle time (days), pass/fail rates, iteration counts, and stability trends. - Robust error handling, caching, and handling of long-running/background tasks. [DRC integration and results processing] - Integrate with a DRC tool (e.g., KLayout or Calibre if available) to execute checks from the app. - Parse and normalize DRC reports; link violations to rule IDs, run IDs, and timestamps. [Rule registry and stability tracking] - Implement a rule registry with metadata (ID, description, deck reference, owners, severity, status). - Track rule updates, QA history, and compute stability signals (no-change windows, regression flags). [Data model and storage] - Design schemas for runs, results, rules, and artifacts (PostgreSQL or SQLite). - Persist logs, reports, and attachments with traceable metadata and audit trails. [In-app basic chatbot] - Add a simple chatbot to answer FAQs (how to run QA, rule descriptions, common errors) using lightweight retrieval over internal docs.

Main Requirements and Qualifications

  • - Bachelor's Degree/ Master's Degree/ PhD in Computer Science / Computer Engineering / Electrical and Electronics Engineering.

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