- Singapore
全职 Test Engineer – ATE (Digital, PMIC, RF - Mixed Signal) 工作, 薪水 up to SGD 7,100, VY SYSTEMS PTE. LTD. 公司招聘中 - Ricebowl
Test Engineer – ATE (Digital, PMIC, RF - Mixed Signal)
VY SYSTEMS PTE. LTD.
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职位描述
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Roles & Responsibilities
Test program development for Digital, PMIC, RF & Mixed Signal products on ATE (primarily on Advantest 93k - SmarTest 7, SmarTest 8 / Teradyne UFLEX).
Work closely with the design engineers on the first silicon debug, device characterization, test program bring up and production release activities.
Debug of digital vectors (JTAG/SCAN/ATPG / Functional / Mbist) and Device characterization across PVT (Process, Voltage and Temperature).
Understanding and experience in characterization of Mixed Signal IP (ADC, DAC, PLL and etc.).
Involve on test program hand o, production release, yield improvement and test time reduction.
High level of collaboration and interaction with different Product Engineering, Design Engineering, Quality Engineering, and Foundry Engineering teams.
Job Requirements
Graduates from Diploma/ Degree in Electronics / Electrical Engineering.
Minimum Minimum 2-4 years of relevant experience on the Test Engineering is preferred.
Hands on experience on Teradyne Ultra Flex or Advantest 93K ATE’s is added advantage.
Good Knowledge of analog and digital electronics is desired.
Strong analytical and problem solving ability with desire to perform hands-on work within a lab environment is a must.
Very strong verbal and written communication skills and able to work independently.
Vy
SYSTEMS PTE. LTD.
Vy Systems offers Technology talent sourcing services (G-TTSS) as one of its primary offering to the customers at global locations. We service our customers with ‘RESPONSIVENESS’ as a key factor and believe that timely response to a TTSS transaction accelerates the revenue, thus increasing the productivity that results in operational efficiency and profitability.
Test program development for Digital, PMIC, RF & Mixed Signal products on ATE (primarily on Advantest 93k - SmarTest 7, SmarTest 8 / Teradyne UFLEX).
Work closely with the design engineers on the first silicon debug, device characterization, test program bring up and production release activities.
Debug of digital vectors (JTAG/SCAN/ATPG / Functional / Mbist) and Device characterization across PVT (Process, Voltage and Temperature).
Understanding and experience in characterization of Mixed Signal IP (ADC, DAC, PLL and etc.).
Involve on test program hand o, production release, yield improvement and test time reduction.
High level of collaboration and interaction with different Product Engineering, Design Engineering, Quality Engineering, and Foundry Engineering teams.
Job Requirements
Graduates from Diploma/ Degree in Electronics / Electrical Engineering.
Minimum Minimum 2-4 years of relevant experience on the Test Engineering is preferred.
Hands on experience on Teradyne Ultra Flex or Advantest 93K ATE’s is added advantage.
Good Knowledge of analog and digital electronics is desired.
Strong analytical and problem solving ability with desire to perform hands-on work within a lab environment is a must.
Very strong verbal and written communication skills and able to work independently.
Vy
SYSTEMS PTE. LTD.
Vy Systems offers Technology talent sourcing services (G-TTSS) as one of its primary offering to the customers at global locations. We service our customers with ‘RESPONSIVENESS’ as a key factor and believe that timely response to a TTSS transaction accelerates the revenue, thus increasing the productivity that results in operational efficiency and profitability.
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