全职 DSP Core Design Engineer, Principal 工作, 薪水, Qualcomm 新竹市, 台灣 公司招聘中 - Ricebowl

Company:

Qualcomm Semiconductor Limited

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

Qualcomm is the largest fabless design company in the world, providing hardware, software, and related services to nearly every mobile device maker and operator in the global wireless marketplace.
A variety of high performance, multithreaded, low power Hexagon cores are at the heart of Qualcomm’s multi-tier mobile SOC, Server, IoT, Automotive roadmap. The Hexagon architecture is designed to deliver performance with low power and area over a variety of applications like Audio, Modem, Machine learning, IoT and Automotive cores. Your work will drive innovation in instruction set, RTOS, software architecture, microarchitecture, power, thermal and solving di/dt issues.

We are looking for a motivated and talented individual to work on our high performance energy efficient cores. Experience with CPU micro-architecture, including knowledge of areas such as processor pipelines, out of order design, load store unit, caches, cache coherence, ordering, memory hierarchy, multi-processor, multi-threaded, 64 bit processor systems is preferred. You will own the microarchitecture and RTL development including low power refinements, performance exploration and meeting area and timing goals. Proficiency in communication, collaboration and teamwork skills required. Experience is RISC-V or ARM architecture is a plus.

Are you passionate about design, looking to solve complex challenging problems and work on innovative solutions? Come join our Hexagon Team which has produced more than 20 billion cores with a track record of flawless execution.

Qualifications:

• Master's degree in computer Science, Engineering, or related field.

• 10+ years CPU architecture experience.

Minimum Qualifications:

• 2+ years of experience with high-performance microprocessor design.

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 8+ years of ASIC design, verification, validation, integration, or related work experience.

OR
Master's degree in Science, Engineering, or related field and 7+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.

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