全职 Senior LSI Physical Design Engineer (IC Design Industry) 工作, 薪水 up to MYR 10,000, Hiredly X 公司招聘中 - Ricebowl

Role Overview

As a Senior LSI Physical Design Engineer, you will be responsible for the end-to-end physical implementation of complex, high-performance SoCs. You will drive the execution of the RTL-to-GDSII flow, ensuring that designs meet aggressive power, performance, and area (PPA) targets. The ideal candidate is a power-user of industry-standard EDA tools and possesses a deep understanding of sub-micron process challenges.

Key Responsibilities

• Synthesis & Logic Excellence: Drive logic synthesis and optimization to transform RTL into gate-level netlists, ensuring timing and area constraints are met from the start.
• Full Implementation (P&R): Execute complete Place and Route (P&R) flows, including floorplanning, power grid analysis, clock tree synthesis (CTS), and routing.
• Timing Closure: Lead Static Timing Analysis (STA) and timing sign-off across various corners and modes; perform Signal Integrity (SI) and crosstalk analysis.
• DFT Integration: Implement and verify Design-for-Test (DFT) structures, including scan chains, MBIST, and JTAG, to ensure high test coverage and yield.
• Power Integrity: Conduct comprehensive power analysis (static and dynamic IR drop) and implement low-power design techniques (multi-voltage domains, power gating).
• Physical Verification: Perform sign-off DRC/LVS/ERC/Antenna checks and resolve complex layout issues to ensure 100% tape-out readiness.
• Flow Automation: Develop and maintain scripts (Tcl, Python, or Perl) to improve productivity and enhance the physical design methodology.