Devloit Hiring! Full Time Physical Design Engineer in Pulau Pinang - Ricebowl

Principal Physical Design Engineer (6–10 Years)

Role Summary:

We are seeking a Principal Physical Design Engineer with 5 –10 years of ASIC physical design experience. The role involves driving the complete physical design flow from floorplanning to GDSII signoff, ensuring timing, power, area (PPA), and quality targets are achieved. You will also contribute to design methodology improvements and mentor junior engineers.

Key Responsibilities:

• Execute end-to-end ASIC physical design (Floorplanning, Place & Route, CTS, Timing Closure, GDSII).
• Optimize designs for PPA while meeting timing and power targets.
• Implement low-power design techniques (Power Gating, Clock Gating, MBR).
• Perform LEC, DRC/LVS, and physical verification/debugging.
• Develop and improve physical design flows and methodologies.
• Mentor junior engineers and collaborate with global design teams.

Required Skills & Qualifications:

• B.E./B.Tech/M.E./M.Tech in Electronics or related field.
• 5–10 years of ASIC Physical Design experience with multiple tape-outs in advanced VDSM nodes.
• Strong expertise in Floorplanning, Placement, CTS, Routing, Timing Closure, and Physical Verification.
• Hands-on experience with Synopsys ICC2/PT, Cadence Innovus, Tempus/ETS, and Cadence PVS.
• Strong understanding of DRC/LVS, DFM, and low-power implementation.
• Excellent debugging, analytical, and communication skills.

To apply, send your resume at *************