Full Time FPGA Engineer Jobs, in UST Malaysia Bayan Lepas - Ricebowl

Technical Competencies

• Proficiency with HDL design such as Verilog, System Verilog, and VHDL.
• Experience working with standard FPGA development tools for various vendors: Xilinx Vivado, Vitis / Quartus / Diamond, Radiant, etc.
• Experience working with simulation tools such as ModelSim and / or QuestaSim
• Familiar with various high-speed interfaces such as PCIe, Ethernet (L1 – L4), USB, DDR, LVDS, etc.
• Familiar with various low speed interfaces such as SPI, I2C, UART, etc.

Preferred experiences

• Experience FPGA developer.
• Familiar with DSP design, simulation, and implementation.
• Knowledge of RF chipset and product development.
• Firmware/driver development knowledge is an added advantage.

Job Requirements

• Bachelor degree in Electrical/Electronic engineering or equivalent.
• Minimum 3-5 years of direct working experiences in FPGA HDL/IP design experience.
• Fluent in both written and spoken English, ability to work in an international team.
• Good team work attitude, collaboration and communication skills.
• Willing to work in Bayan Lepas, Penang Malaysia.