CADFEM APAC Hiring! Full Time Power Engineer in Pulau Pinang - Ricebowl

Job Summary

We are seeking a highly skilled Power Analysis Engineer to drive power integrity (PI) analysis and optimization for advanced semiconductor designs. The role involves performing dynamic and static IR drop analysis, ensuring robust power delivery network (PDN) design, and achieving successful EM/IR signoff for high-performance, low-power chips.

Key Responsibilities

• Perform static and dynamic IR drop analysis across block and full-chip levels.
• Design and optimize power delivery networks (PDN), including grid planning and decoupling strategies.
• Conduct Electromigration (EM) and IR drop signoff, and implement mitigation strategies.
• Analyze and resolve power integrity issues, including voltage drop, noise, and reliability concerns.
• Correlate silicon measurements with simulation results and refine models accordingly.
• Work closely with:

−Physical Design (PD) teams for implementation alignment.

−Package and system teams to ensure end-to-end PDN integrity.

• Drive power optimization techniques for improved performance and reliability.
• Debug and resolve power-related issues during tape-out and post-silicon stages.
• Support design closure with a focus on PPA (Performance, Power, Area) targets

Education

Bachelor’s or Master’s degree in in Electronics / Electrical / VLSI Engineering

Experience

• Experience in high-performance SoC or ASIC designs.
• Exposure to post-silicon validation and correlation.
• Proven experience working on advanced technology nodes (preferred).
• Experience in full-chip or block-level power analysis.