Responsible for RTL to GDS design and development activities of MediaTek’s Ghz ARM/Imagination-based graphics processors, AI processors and neural network DS. Involve in activities encompass physical design and analysis of complex and timing-critical graphics processor AI processors and neural network DSP. Technical disciplines include Physical Implementation (floor-planning, place and route, RC extraction, timing and power optimization) & signoff (DRC, LVS, STA, PI).
At least 4 years of experience in Physical Design and Signoff Skills: 1. Synthesis:: PPA improvement through synthesis recipe exploration for better perf, power, and area. 2. Physical design :: Floor Planning, Place & Route followed by Timing and Physical Closure 3. Signoff :: PI : PG mesh spec selection, Bump/RDL planning, IR closure PV : DRC, LVS, ANT, ERC closure STA : Block level timing closure