Full Time Design Verification Staff Engineer Jobs, in Nityo Infotech - Ricebowl

Job Overview:

Responsible for developing and executing verification strategies to ensure the quality and functionality of complex SoC, High-Speed IO Subsystem, and Chiplet designs. This includes building UVM-based testbenches, integrating Verification IPs (VIPs), and applying advanced verification methodologies. The role requires strong problem-solving, debugging, and scripting skills, along with the ability to collaborate, mentor, and drive verification excellence.

Responsibilities:

• Lead and drive verification efforts for High-Speed IO Subsystem, SoC, and Chiplet to ensure robust design quality and functionality.

• Define and implement comprehensive verification strategies, working closely with designers and architects to develop detailed verification plans.

• Develop and enhance UVM-based testbenches, including test cases, monitors, scoreboards, sequencers, and sequences, to support feature verification.

• Integrate industry-standard Verification IPs (VIPs) into the verification environment, optimizing test efficiency and coverage.

• Architect and implement SystemVerilog/UVM/SystemC-based testbenches utilizing Bus Functional Models (BFM) to support verification activities.

• Develop functional coverage models or Formal Verification methodologies, leveraging SystemVerilog Assertions (SVA) to enhance design validation, correctness, and completeness.

• Develop scalable, reliable, and flexible verification environments, contributing to testbench infrastructure and automation for efficiency.

• Mentor, coach, and provide technical guidance to junior engineers, fostering a culture of continuous learning and excellence.

Qualification:

• Bachelor’s or Master’s Degree in Engineering (Electrical / Electronics, Computer Engineering, or related discipline).

• 1-15 years of working experience in SoC verification or a related field, with a strong track record in complex verification environments.

• Proven experience in integrating industry-standard Verification IPs (VIPs) into verification. environments to improve test efficiency and accuracy.

• Passion for leadership, with a demonstrated ability to coach, mentor, and guide teams towards high-

performance verification execution.

Skills & Knowledge:

• Knowledge with verification tools and methodologies

• Proficiency in AMBA protocols including AXI, CHI, ACE, and APB.

• Extensive hands-on experience with SystemVerilog, OVM, UVM, and SystemC for verification.

• Deep understanding of functional coverage, assertions (SVA), and test development methodologies.

• Expertise in subsystem verification for UCIE / PCIe / CXL / Ethernet / HBM / LPDDR is highly desirable.

• Strong scripting skills in Python and Shell for automation and testbench development.

• Good debugging, problem solving and analytical skills. Able to work independently

• Good verbal and written communication skills. Strong interpersonal skills