About the Job
Vchip is looking for a mid-level Analog Layout Design Engineer to join our IC design team. You'll work closely with circuit designers to plan and construct high-quality analog and mixed-signal layouts, from floorplanning through final verification.
The Role
As an Analog Layout Design Engineer, you will collaborate with the circuit design team to translate schematics into robust, silicon-ready layouts. You'll take ownership of assigned blocks, from floorplanning and power/signal routing through DRC/LVS sign-off, while working closely with design and verification engineers to meet project milestones.
Key Responsibilities
- Complete transistor-level layout of analog, digital, and mixed-signal circuits
- Own assigned blocks of custom IP designs from floorplan through tape-out
- Perform floorplanning, power grid planning, and signal flow planning in collaboration with analog designers
- Conduct physical and electrical verification, including DRC, LVS, ERC, EM/IR, latch-up, and ESD checks
- Work closely with circuit designers to ensure layout meets electrical and performance requirements
- Track and report progress against block-level schedules and milestones
- Apply good matching, shielding, and isolation techniques for sensitive analog signals
Preferred Experience
- Solid understanding of CMOS circuit theory and analog design fundamentals
- 2+ years of relevant experience in analog or mixed-signal layout design
- Hands-on experience with Cadence Virtuoso and Calibre (DRC/LVS/ERC)
- Familiarity with EM/IR, latch-up, and ESD verification flows
- Good understanding of matching, shielding, and isolation techniques for analog layout
- Strong communication skills to work effectively with cross-functional design teams
- Ability to work both independently and as part of a team
Academic Credentials
Bachelor’s or Master’s degree in Electrical/Electronic Engineering or a related field