Qualifications :
- Bachelor's Degree Engineering in Electrical/Electronic, Physics, Computer or related fields
Requirements:
- Layout & EDA tool skill: Expertise with Cadence and Synopsys
- Willing to put extra effort to keep the project schedule.
- At least have a minimum of 3-5 years’ experience in Analog IC layout design.
- Must have good verbal and written communication skills in English. Japanese is a plus
- Willing to work flexible hours to support different time zone teams.
- Need to work onsite.
- Good interpersonal, communication, and collaboration skills.
Preferable someone who is having:
- Thorough understanding of integrated analog circuit design
- Thorough understanding of chip layout in cell and block level creation, edit and full verification.
- Experience with layout techniques for matching, ESD, latch-up prevention and parasitic reduction and work with an awareness and understanding of the process from physical point of view.
- Experience in analog IC/ mixed signals IC layout designs and verification. Able to perform with ideas on chip size reduction.
- Highly self-motivated and adaptable.
- Having the basic knowledge of CMOS related devices including high voltage and the skill of deciphering Design Manual
Job Description:
- Work and lead junior engineer towards projects delivery with other layout and circuit design engineers to resolve any technical issues that will affect layout to ensure high quality.
- Utilize EDA tools (Cadence and Synopsys) for layout design and all related verification items, perform all layout activities as cell and block level creation, edit and full verification.
- Use state-of-the-art layout techniques for matching, ESD, latch-up prevention and parasitic reduction and work with an awareness and understanding of the process from physical point of view.
- Attending all relevant project meetings, continuous assessment and reporting of timescale risks.
- Where possible, use schematic driven layout and consider top level auto routing.
- Involve in review session and prepare all related document and data preparation for wafer tape out.
Job Type: Full-time
Pay: RM7,500.00 - RM14,500.00 per month
Ability to commute/relocate:
- Bayan Lepas: Reliably commute or planning to relocate before starting work (Preferred)
Application Question(s):
- What is your expected salary?
Work Location: In person