Full Time Physical Design Engineer (STA) Jobs, in Oppstar Berhad Kuala Lumpur - Ricebowl

Role Description

The role involves designing, implementing, and verifying the physical design of semiconductor chips, ensuring adherence to design specifications and process technologies. Day-to-day tasks include performing static timing analysis, working on physical verification, and collaborating with cross-functional teams to deliver high-quality designs. The engineer will address issues related to timing closure, circuit analysis, and optimization (SYN to GDS).

• The candidate must work closely with team members and interact with the product/IP architect, logic design engineer, DFX owner, and design automation engineer to ensure timely job delivery.
• Willing to travel (domestic/international), or relocate

Qualifications

• Bachelor’s / Master’s degree with minimum 3 years’ relevant industry experience in SoC/ASIC Physical Design
• Knowledge and experience in Logic Design and Circuit Design principles.
• Understanding of RTL Design and its implementation.
• Familiar with Linux OS and proficient in scripting using shell, TCL, Perl, Python, or C++, etc
• Rich hands-on experience with industrial standard EDA tools and flow on synthesis, floorplanning, clock tree, static timing analysis, signal integrity, EM/IR analysis, ECO implementation, formality verification, and physical design verification. (e.g.Cadence and/or Synopsys; super user is a plus)
• Experience with SoC/ASIC design methodologies and tools
• Experience in complex clocks design, clock gating, and power gating design methodology
• Excellent problem-solving and analytical skills
• Excellent written and verbal communication skills
• Experience in leading small teams and collaborating on large projects
• Experience in working in a global engineering environment would be a plus

To help us ensure a fair and thorough review process, applications for the same job role can be resubmitted only after three months. Kindly cooperate on this.

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